Conferences

  1. C. Niessen, C. H. K. van Berkel, M. Rem, and R. W. J. J. Saeijs, “VLSI programming and silicon compilation: A novel approach from Philips Research,” in Proc. International Conf. Computer Design (ICCD), (Rye Brook, New York), pp. 150–151, IEEE Computer Society Press, 1988.
  2. Kees van Berkel, Martin Rem, and Ronald. Saeijs, “VLSI programming,” in Proc. International Conf. Computer Design (ICCD), pp. 152–156, IEEE Computer Society Press, 1988.
  3. Kees van Berkel and Ronald Saeijs, “Compilation of communicating processes into delay-insensitive circuits,” in Proc. International Conf. Computer Design (ICCD), pp. 157–162, IEEE Computer Society Press, 1988.
  4. Ronald Saeijs and Kees van Berkel, “The design of the VLSI image generator ZaP”. In Proc. International Conf. Computer Design (ICCD), pages 163-166. IEEE Computer Society Press, 1988.
  5. Kees van Berkel, Joep Kessels, Marly Roncken, Ronald Saeijs, and Frits Schalij, “The VLSI-programming language Tangram and its translation into handshake circuits,” in Proc. European Conference on Design Automation (EDAC), pp. 384–389, 1991.
  6. Joep Kessels, “The Systematic Design of a Systolic RSA Converter.” Pages 235-251 in Proc. Workshop on Correct Hardware Design Methodologies, 1991.
  7. J. Kessels, K. van Berkel, R. Burgess, M. Roncken, and F. Schalij, “An error decoder for the compact disc player as an example of VLSI programming,” in Proc. European Conference on Design Automation (EDAC), pp. 69–74, Mar. 1992.
  8. K. v. Berkel, “VLSI programming of a modulo-N counter with constant response time and constant power,” in Asynchronous Design Methodologies (S. Furber and M. Edwards, eds.), vol. A-28 of IFIP Transactions, pp. 1–11, Elsevier Science Publishers, 1993.
  9. K. v. Berkel, R. Burgess, J. Kessels, M. Roncken, and F. Schalij, “Characterization and evaluation of a compiled asynchronous IC,” in Asynchronous Design Methodologies (S. Furber and M. Edwards, eds.), vol. A-28 of IFIP Transactions, pp. 209–221, Elsevier Science Publishers, 1993.
  10. J. Haans, K. van Berkel, A. Peeters, and F. Schalij, “Asynchronous multipliers as combinational handshake circuits,” in Asynchronous Design Methodologies (S. Furber and M. Edwards, eds.), vol. A-28 of IFIP Transactions, pp. 149–163, Elsevier Science Publishers, 1993.
  11. M. Roncken and R. Saeijs, “Linear test times for delay-insensitive circuits: a compilation strategy,” in Asynchronous Design Methodologies (S. Furber and M. Edwards, eds.), vol. A-28 of IFIP Transactions, pp. 13–27, Elsevier Science Publishers, 1993.
  12. Joep Kessels, “Calculational Derivation of a Counter with Bounded Response Time.” In Proc. Workshop on Correct Hardware Design Methodologies, 1993.
  13. K. v. Berkel, R. Burgess, J. Kessels, A. Peeters, M. Roncken, and F. Schalij, “A fully asynchronous low-power error corrector for the DCC player,” in International Solid State Circuits Conference, pp. 88–89, Feb. 1994.
  14. M. Roncken, “Partial scan test for asynchronous circuits illustrated on a DCC error corrector,” in Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems, pp. 247–256, Nov. 1994.
  15. K. v. Berkel, R. Burgess, J. Kessels, A. Peeters, M. Roncken, F. Schalij, and R. van de Wiel, “A single-rail re-implementation of a DCC error detector using a generic standard-cell library,” in Asynchronous Design Methodologies, pp. 72–79, IEEE Computer Society Press, May 1995.
  16. K. v. Berkel, F. Huberts, and A. Peeters, “Stretching quasi delay insensitivity by means of extended isochronic forks,” in Asynchronous Design Methodologies, pp. 99–106, IEEE Computer Society Press, May 1995.
  17. J. Kessels, “VLSI programming of a low-power asynchronous Reed-Solomon decoder for the DCC player,” in Asynchronous Design Methodologies, pp. 44–52, IEEE Computer Society Press, May 1995.
  18. A. Peeters and K. van Berkel, “Single-rail handshake circuits,” in Asynchronous Design Methodologies, pp. 53–62, IEEE Computer Society Press, May 1995.
  19. R. v. d. Wiel, “High-level test evaluation of asynchronous circuits,” in Asynchronous Design Methodologies, pp. 63–71, IEEE Computer Society Press, May 1995.
  20. K. v. Berkel and A. Bink, “Single-track handshaking signaling with application to micropipelines and handshake circuits,” in Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems, pp. 122–133, IEEE Computer Society Press, Mar. 1996.
  21. K. v. Berkel, “ESPRIT 6143: Exploitation of asynchronous circuit technologies,” in IEEE International Conference on Electronics, Circuits and Systems, pp. 764–767, Oct. 1996.
  22. M. Roncken and E. Bruls, “Test quality of asynchronous circuits: A defect-oriented evaluation,” in Proc. International Test Conference, pp. 205–214, Oct. 1996.
  23. M. Roncken, E. Aarts, and W. Verhaegh, “Optimal scan for pipelined testing: An asynchronous foundation,” in Proc. International Test Conference, pp. 215–224, Oct. 1996.
  24. H. v. Gageldonk, “VLSI-programming of low-power applications,” in Proc. of the IEEE/ProRISC Symposium on Circuits, Systems and Signal Processing, 1996.
  25. J. Kessels and P. Marston, “Designing asynchronous standby circuits for a low-power pager,” in Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems, pp. 268–278, IEEE Computer Society Press, Apr. 1997.
  26. H. v. Gageldonk, D. Baumann, K. van Berkel, D. Gloor, A. Peeters, and G. Stegmann, “An asynchronous low-power 80c51 microcontroller,” in Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems, pp. 96–107, 1998.
  27. R. Negulescu and A. Peeters, “Verification of speed-dependences in single-rail handshake circuits,” in Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems, pp. 159–170, 1998.
  28. J. Kessels, T. Kramer, G. den Besten, A. Peeters, and V. Timm, “Applying asynchronous circuits in contactless smart cards,” in Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems, pp. 36–44, IEEE Computer Society Press, Apr. 2000.
  29. J. Kessels, T. Kramer, A. Peeters, and V. Timm, “DESCALE: a design experiment for a smart card application consuming low energy,” in European Low Power Initiative for Electronic System Design (R. van Leuken, R. Nouta, and A. de Graaf, eds.), pp. 247–262, Delft Institute of Microelectronics and Submicron Technology, July 2000.
  30. A. Peeters, “Support for interface design in Tangram,” in Asynchronous Interfaces: Tools, Techniques, and Implementations (A. Yakovlev and R. Nouta, eds.), pp. 57–64, July 2000.
  31. F. Pessolano and J. Kessels, “Asynchronous first-in first-out queues,” in Power and Timing Modeling, Optimization and Simulation (PATMOS), vol. 1918 of Lecture Notes in Computer Science, pp. 178–186, Sept. 2000.
  32. J. Kessels and A. Peeters, “The Tangram framework: Asynchronous circuits for low power,” in Proc. of Asia and South Pacific Design Automation Conference, pp. 255–260, Feb. 2001.
  33. J. Kessels, A. Peeters, T. Kramer, M. Feuser, and K. Ully, “Designing an asynchronous bus interface,” in Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems, pp. 108–117, IEEE Computer Society Press, Mar. 2001.
  34. A. Peeters and K. van Berkel, “Synchronous handshake circuits,” in Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems, pp. 86–95, IEEE Computer Society Press, Mar. 2001.
  35. K. v. Berkel, A. Peeters, and F. te Beest, “Adding synchronous and LSSD modes to asynchronous circuits,” in Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems, pp. 161–170, Apr. 2002.
  36. J. Kessels, A. Peeters, P. Wielage, and S.-J. Kim, “Clock synchronization through handshake signalling,” in Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems, pp. 59–68, Apr. 2002.
  37. Frank te Beest, Ad Peeters, Kees van Berkel, and Hans Kerkhoff, “Synchronous full-scan for asynchronous handshake circuits,” in IEEE European Test Workshop (ETW02), pp. 381–387, May 2002.
  38. F. Pessolano, J. Kessels, and A. Peeters, “MDSP: a high-performance low-power DSP architecture,” in Power and Timing Modeling, Optimization and Simulation (PATMOS), vol. 2451 of Lecture Notes in Computer Science, Sept. 2002.
  39. Frank te Beest, Ad Peeters, Marc Verra, Kees van Berkel, and Hans Kerkhoff, “Automatic scan insertion and test generation for asynchronous circuits,” in Proc. International Test Conference, pp. 804–813, Oct. 2002.
  40. J. Kessels, A. Peeters, and S.-J. Kim, “Bridging clock domains by synchronizing the mice in the mousetrap,” in Power and Timing Modeling, Optimization and Simulation (PATMOS) (J. J. Chico and E.Macii, eds.), vol. 2799 of Lecture Notes in Computer Science, pp. 141–150, Sept. 2003.
  41. Frank te Beest and Ad Peeters, “A multiplexer based test method for self-timed circuits,” in Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems, pp. 166–175, 2005.
  42. J. Kessels, “Register-communication between mutually asynchronous domains,” in Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems, pp. 66–75, 2005.
  43. Arjan Bink and Richard York, “ARM996HS, The First Licensable, Clockless 32-bit Processor Core”, Hot Chips, Stanford, August 2006.
  44. M. De Clercq, A. Bink, A. Peeters, W. Mallon, M. van Hulst. “Clockless ARM996HS based on Handshake Technology”. Sophia Antipolis Microelectronics Conference (SAME), 2006.

Journals

  1. Joep Kessels and Frits Schalij, VLSI Programming for the Compact Disc Player. In Science of Computer Programming, 15, pages 235-248, 1990.
  2. Joep Kessels and Martin Rem, Designing systolic, distributed buffers with bounded response time. In Distributed Computing, 4, pages 37-43, 1990.
  3. Kees van Berkel, “Beware the isochronic fork,” Integration, the VLSI journal, vol. 13, pp. 103–128, June 1992.
  4. K. v. Berkel, R. Burgess, J. Kessels, A. Peeters, M. Roncken, and F. Schalij, “Asynchronous circuits for low power: A DCC error corrector,” IEEE Design & Test of Computers, vol. 11, pp. 22–32, Summer 1994.
  5. K. v. Berkel, R. Burgess, J. Kessels, A. Peeters, M. Roncken, and F. Schalij, “A fully asynchronous low-power error corrector for the DCC player,” IEEE Journal of Solid-State Circuits, vol. 29, pp. 1429–1439, Dec. 1994.
  6. L. S. Nielsen, C. Niessen, J. Sparsø, and C. H. van Berkel, “Low-power operation using self timed and adaptive scaling of the supply voltage,” IEEE Transactions on VLSI Systems, vol. 2, pp. 391–397, Dec. 1994.
  7. J. L. W. Kessels, “Calculational derivation of a counter with bounded response time and bounded power dissipation,” Distributed Computing, vol. 8, no. 3, pp. 143–149, 1995.
  8. C. H. K. v. Berkel, M. B. Josephs, and S.M. Nowick, “Scanning the technology: Applications of asynchronous circuits,” Proceedings of the IEEE, vol. 87, pp. 223–233, Feb. 1999.
  9. J. Kessels and P. Marston, “Designing asynchronous standby circuits for a low-power pager,” Proceedings of the IEEE, vol. 87, pp. 257–267, Feb. 1999.
  10. M. Roncken, “Defect-oriented testability for asynchronous IC’s,” Proceedings of the IEEE, vol. 87, pp. 363–375, Feb. 1999.
  11. C. H. K. v. Berkel and C. E. Molnar, “Beware the three-way arbiter,” IEEE Journal of Solid-State Circuits, vol. 34, pp. 840–848, June 1999.
  12. Frank te Beest, Ad Peeters, Kees van Berkel, and Hans Kerkhoff, “Synchronous full-scan for asynchronous handshake circuits,” Journal of Electronic Testing: Theory and Applications, vol. 19, pp. 397–406, 2003.
  13. K. v. Berkel, A. Peeters, and F. te Beest, “Adding synchronous and LSSD modes to asynchronous circuits,” Microprocessors and Microsystems, vol. 27, pp. 461–471, Oct. 2003.
  14. J. Kessels, A. Peeters, P. Wielage, and S.-J. Kim, “Clock synchronization through handshake signalling,” Microprocessors and Microsystems, vol. 27, pp. 447–460, Oct. 2003.
  15. Arjan Bink and Richard York, “ARM996HS, the first licensable, clockless 32-bit processor core,” IEEE Micro, 2007.

PhD Thesis

  1. Kees van Berkel, Handshake Circuits: An Intermediary between Communicating Processes and VLSI. PhD thesis, Eindhoven University of Technology, 1992.
  2. A. M. G. Peeters, Single-Rail Handshake Circuits. PhD thesis, Eindhoven University of Technology, June 1996.
  3. H. v. Gageldonk, An Asynchronous Low-Power 80C51 Microcontroller. PhD thesis, Dept. of Math. and C.S., Eindhoven Univ. of Technology, Sept. 1998.
  4. Frank J. te Beest, Full scan testing of handshake circuits. PhD thesis, Twente University, Enschede, The Netherlands, May 2003.

Miscellaneous

  1. C. H. van Berkel, “Beware the isochronic fork,” Nat. Lab. Unclassified Report UR 003/91, Philips Research Lab., Eindhoven, The Netherlands, 1991.
  2. Joep Kessels, “Designing Counters with Bounded Response Time”. Pages 127-140 in W.H.J. Feijen and A.J.M van Gasteren (Eds), C.S. Scholten dedicata: van oude machines en nieuwe rekenwijzen, 1991.
  3. K. v. Berkel, Handshake Circuits: an Asynchronous Architecture for VLSI Programming, vol. 5 of International Series on Parallel Computation. Cambridge University Press, 1993.
  4. K. v. Berkel and M. Rem, “VLSI programming of asynchronous circuits for low power,” in Asynchronous Digital Circuit Design (G. Birtwistle and A. Davis, eds.), Workshops in Computing, pp. 152–210, Springer-Verlag, 1995.
  5. K. v. Berkel, H. van Gageldonk, J. Kessels, C. Niessen, A. Peeters, M. Roncken, and R. van de Wiel, “Asynchronous does not imply low power, but ...,” in Low Power CMOS Design (A. Chandrakasan and R. Brodersen, eds.), pp. 227–232, IEEE Press, 1998.
  6. J. Kessels, T. Kramer, A. Peeters, and V. Timm, “DESCALE: a design experiment for a smart card application consuming low energy,” in Principles of Asynchronous Circuit Design: A Systems Perspective (J. Sparsø and S. Furber, eds.), ch. 13, Kluwer Academic Publishers, 2001.
  7. A. Peeters, “Implementation of handshake components,” in Communicating Sequential Processes, the first 25 years (A. E. Abdallah, C. B. Jones, and J. W. Sanders, eds.), vol. 3525 of Lecture Notes in Computer Science, pp. 98–132, 2005.
  8. Arjan Bink and Richard York, “The beauty of designing clockless LSIs”, in Nikkei Electronics, pp. 137–146, September 11, 2006. (in Japanese)
  9. Arjan Bink, Mark de Clercq, and Richard York, “ARM996HS Synthesizable CPU with Clockless Technology”, Information Quarterly, volume 5, number 4, pp. 20–24. ARM, 2006.