Highlights

• New timing validation and optimization flow
• Multiplexer-based scan approach – full scan, smaller area
• Unified command-line interface for all tools

Timing validation and optimization flow

We’ve substantially revised the tool chain for more accurate delay calculation and improved optimization. The new version of the tool chain no longer contains the separate delay calculation tool (htcal). This functionality has been incorporated into an upgraded htpost, which now collects all timing and optimization constraints, and generates TCL scripts for standard EDA tools like Cadence® PKS and Synopsis® Design Compiler®.

Multiplexer-based scan

The new release features multiplexer-based scan technology (as presented at the Async2005 conference http://vlsi.cornell.edu/async2005/). Using this technique, the overhead for scan chain insertion in the control is reduced significantly so that the overhead for Haste circuits approaches that for synchronous designs.

Unified command-line interface

With this release, the Handshake Solutions design flow evolves from a suite of stand-alone modules to a streamlined package of integrated tools. The new unified command-line interface makes it even easier to use the toolset in a flow. Tools can be run directly from the command line and it is easier to use the tools in Make file, thanks to the ability to explicitly specify each input file.

The layered configuration file approach also makes it extremely easy to define generic, personal and project-specific settings.